منابع مشابه
Trace Cache Performance
Instruction fetch mechanism is a performance bottleneck of a Superscalar Processor. Fetch performance can be improved with the aid of an instruction memory known as a Trace Cache. This paper presents analytical expressions, which describe instruction fetch performance of a Trace Cache microarchitecture. The instruction fetch rates predicted by the expressions differ by seven percent from the si...
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Cache aanity is important to the performance of scalable shared memory multipro-cessors. For multiprocessors without hardware cache coherence support, software cache coherence is the only alternative. Most existing software cache schemes ignore cache aanity across parallel loops. In this paper, we propose a new scheme, Cache AAnity-based Software cache coherence scheme (CAS), that exploits cach...
متن کاملThe Software-Cache Connection
This paper describes an adaptation of standard Fourier analysis techniques to the study of software-cache interactions. The cache is viewed as a " black box " boolean signal generator, where " ones " correspond to cache misses and " zeros " correspond to cache hits. The spectrum of this time sequence is used to study the dynamic characteristics of complex systems and workloads with minimal a pr...
متن کاملTowards a More Efficient Trace Cache
Abstract— If the trace cache size is not large enough to contain all of the basic blocks of running application, a judicious hit and replacement logic becomes very important. This report proposes a weight-based technique to select the victim line in trace cache for the replacement logic. It also presents a judicious line-fill buffer logic which is found to decrease the redundancy in the trace c...
متن کاملA Trace Cache Microarchitecture and Evaluation
As the instruction issue width of superscalar processors increases, instruction fetch bandwidth requirements will also increase. It will eventually become necessary to fetch multiple basic blocks per clock cycle. Conventional instruction caches hinder this effort because long instruction sequences are not always in contiguous cache locations. Trace caches overcome this limitation by caching tra...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computers
سال: 2005
ISSN: 0018-9340
DOI: 10.1109/tc.2005.13